Joycee Mekie

Associate Professor
Electrical Engineering
IIT Gandhinagar

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Joycee Mekie

Joycee Mekie

Associate Professor, Electrical Engineering
Email: joycee@iitgn.ac.in
Office: Academic Block 4/320 | Nanoelectronics Devices and Circuits Laboratory (nanoDC Lab)
Address: Indian Institute of Technology Gandhinagar
Palaj, Gandhinagar-382355, GUJARAT

Research Interest

  • Memory Centric Circuits and Architectures
  • Approximate Circuits and Architectures for Machine Learning
  • Asynchronous Design
  • Low Power Memory Systems
  • Radiation Hardened Systems

Education

  • Ph.D., IIT Bombay, 2009, Department of Electrical Engineering, Microelectronics
  • M.E., M. S. University of Baroda, 1999, Department of Electrical Engg., Microprocessor Systems & Applications
  • B.E., M. S. University of Baroda, 1997, Department of Electrical Engineering, Electrical Honours Diploma in Systems Management, 3-year program, NIIT, 1996

Professional Experience

  • Associate Professor, Indian Institute of Technology, Gandhinagar (Oct 2021 to present)
  • Assistant Professor, Indian Institute of Technology, Gandhinagar (Dec 2009 - Oct 2021)
  • Assistant Professor, Electrical Engg. Dept. M. S. University of Baroda, (Jun 2007 - Dec 2009)
  • Lecturer, Electrical Engg., S. V. I. T Engg. College, Vasad, Gujarat (2000-2001)
  • Lecturer, Electrical Engg., S. V. M. I. T. Engg. College Bharuch, Gujarat (1999-2000)
  • Lecturer, Electrical Engg., V. V. P Engg. College, Rajkot, Gujarat (1998-1999)

Professional Activities

  • Reviewer for International Journals: IEEE Design and Test, IEEE Sensors, IEEE Transactions on Circuits and Systems II,IEEE Transactions on Circuits and Systems I, Microelectronics reliability journal
  • Reviewer for National Journals: Sadhana Academy proceedings in Engineering Science (SADH)
  • Steering Committee member & PC member – International Symposium on Asynchronous Circuits and Systems ASYNC 2015, ASYNC 2016, ASYNC 2017
  • Techincal program committee member - International Conference on VLSI Design and Embedded Systems – VLSI’15, VLSI’18, VLSI’19, VLSI Design and Test – VDAT’17, VDAT’19, Iternational Conference INDICON’13
  • External Examiner: MTech: SVNIT Surat, Parul institute Vadodara; PhD:SVNIT Surat, Nirma University

Awards and Honours

  • Young Faculty Research Award, 2018