Aditya Biswas - Thesis Title SRAM based In Memory Computing for Energy Efficient AI system - Working as R&D Engineer, Synopsys Inc.
2021
Anoop Kumar - Working as Hardware Engineer, Qualcomm
Ayush Agarwal - Working as DFT Engineer, NVIDIA
Naveen Puri - Working as Memory Design Engineer at Ceremorphic
Rajesh Kumar - Working as Senior Design Engineer at Marvell Technology
Roshni Dhandamudi - Working as Memory Design Engineer at Ceremorphic
Rajat Borkar - Working as Graphics Hardware Engineer at Intel Corporation
Smit Shah - Working as Graphics Hardware Engineer at Intel Corporation
Tushar Agarwal - Working as Graphics Hardware Engineer at Intel Corporation
Varun Tej - Working as ASIC Design Engineer at NVIDIA
Mallikarjun P
2020
Ankita Nandi - Thesis Title Co-optimizating Energy and Quality Using Approximate Designs and Techniques - Joined IIT Gandhinagar as PhD Scholar
Jitesh Sah - Thesis Title Framework for Synchronous to Asynchronous Design Conversion - Working as a Digital Design Engineer at Ceremorphic
Gyanendra Tiwari - Thesis Title Design of Memory Compiler for Embedded Memories - Working as a Memory Design Engineer at Ceremorphic
Diptesh Datta - Thesis Title Application-Centric Efficient SRAM/CAM/TCAM Memory Design - Working as Design Engineer at Micron Technology
Surendra Maurya - Thesis Title Energy Efficient Sense-Amplifier Designs using Different Replica Circuits - Working as a Memory Design Engineer at Ceremorphic
2019
Arun Singh Tomar - Thesis Title Configurable Approximate Circuits for Low Power FPGA based Applications - Working as Design Verification Engineer at Marvell Semiconductor
Mili Lavania - Thesis Title Building Energy Efficient Radiation Hardened Memories and Memory Subsystem - Working as Design Verification Engineer at Marvell Semiconductor
Abhishek Barma -Thesis Title High Performance Radiation Hardened Random Access and Content Addressable Memory Designs - Working as Silicon Design Engineer at Advanced Micro Devices
Joydeep Devnath - Thesis Title An approach towards building Energy Efficient Architectures for Neural Networks - Working as Junior Research Fellow at IIT Gandhinagar
2018
Shubhanshu Gupta - Thesis Title Single and Double Node Upset Hardened Flip-Flops for Space Applications - Working as Design Verification Engineer at NXP Semiconductor
Ishant Anand - Thesis Title Design of Radiation Hardened Memories and Memory Compiler - Working as Senior Engineer at MediaTek
Smriti Gupta - Thesis Title Building of Radiation Hardened Processor Designs - Working as Engineer at MediaTex
Vishwanath Hiremath - Thesis Title Approximate Neural Networks on FPGA - Working as Senior Engineer at MediaTek
2017
Hemal Shah - Thesis Title Soft Error Tolerant Designs using Guarded Dual Rail Logic - Working as Design Verification Engineer at Marvell Semiconductor
Neha Kumar - Thesis Title Interfaces for Ratiochronous Network on Chips - Working as Senior Tapeout Engineer at GlobalFoundries
2016
Raminder Kaur - Thesis Title Guarded Dual Rail Logic for Soft Error Tolerant Standard Cell Library - Working as Digital Verification Engineer at Texas Instruments
Omkar Pujari - Thesis Title Study of Variability and Technology Scaling on Synchronizers and Design of Metastable-hard Synchronizers - Working as Digital Design Engineer at Analog Devices
2015
Fathima Sinin - Thesis Title Design and implementation of efficient neuromorphic architectures - Working as Air Traffic Controller at Airport Authority of India
Chandrashekhar Tunga - Thesis Title Design and implementation of efficient neuromorphic architectures - Working as Senior Lead Engineer at Qualcomm
2014
Bala Saranya Y - Thesis Title Evaluating the scaling effects on synchronizers and global interconnects in multi-core SoCs - Working as SSC at Infosys